1 fn6491.2 5962-0625601, 5962-0625602 1.4ghz current feedb ack amplifiers with enable the 5962-0625601qxc and 5962-0625602qxc are fully dla smd compliant parts and the smd data sheets are available on the dla website (http://www.landandmaritime.dl a.mil/programs/milspec/doc search.aspx). the 5962-0625601qxc is electrically equivalent to the el5166, the 5962-0625602qxc is electrically equivalent to the el5167. reference equivalent ?el? data sheet for additional information. the amplifiers are of the current feedback variety and exhibit a very high bandwidth of 1.4ghz at a v = +1 and 800mhz at a v = +2. this makes these amplifiers ideal for today's high speed video and monitor applications, as well as a number of rf and if frequency designs. with a supply current of just 12m a and the ability to run from a single supply voltage from 5v to 12v, these amplifiers offer very high performance for little power consumption. the 5962-0625601qxc also incorporates an enable and disable function to reduce the supply current to 13a typical per amplifier. allowing the ce pin to float or applying a low logic level will enable the amplifier. features ? gain-of-1 bandwidth = 1.4ghz/gain-of-2 bandwidth = 800mhz ? 6000v/s slew rate ? single and dual supply operation from 5v to 12v ? low noise = 1.5nv/ hz ? 12ma supply current ? fast enable/disable (5962-0625601qxc only) applications ? video amplifiers ? cable drivers ? rgb amplifiers ? test equipment ? instrumentation ? current to voltage converters ordering information part number part marking package pkg. dwg. # 5962-0625601qxc 06256 01qxc 10 ld flat pack k10.a 5962-0625602qxc 06256 02qxc 10 ld flat pack k10.a note: these intersil pb-free herm etic packaged products employ 100% au plate - e4 termination finish, which is rohs compliant and compatible with both snpb and pb-free soldering operations. pinouts 5962-0625601qxc (10 ld flat pack) top view 5962-0625602qxc (10 ld flat pack) top view in+ vs- ce vs+ nc 10 9 8 7 6 2 3 4 5 1 in- nc out nc nc in+ vs- nc vs+ nc 10 9 8 7 6 2 3 4 5 1 in- nc out nc nc data sheet november 3, 2011 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | intersil (and design) is a registered trademark of intersil americas inc. copyright intersil americas inc. 2007, 2011. all rights reserved all other trademarks mentioned are the property of their respective owners.
2 fn6491.2 november 3, 2011 absolute maxi mum ratings (t a = +25c) thermal information supply voltage between v s + and v s - . . . . . . . . . . . . . . . . . . . 12.6v slewrate between v s + and v s - . . . . . . . . . . . . . . . . . . . . . . . . 1v/s maximum continuous output current . . . . . . . . . . . . . . . . . . . 20ma i into v in +, v in -, enable pins . . . . . . . . . . . . . . . . . . . . . . . . . 4ma pin voltages . . . . . . . . . . . . . . . . . . . . . . . . . v s - -0.5v to v s + +0.5v thermal resistance (typical) ja (c/w) jc (c/w) flat pack package (notes 1, 2) . . . . . . 165 60 storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65c to +150c ambient operating temperature . . . . . . . . . . . . . . .-55c to +125c die junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . +150c power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .144mw caution: do not operate at or near the maximum ratings listed fo r extended periods of time. exposure to such conditions may adv ersely impact product reliability and result in failures not covered by warranty. notes: 1. ja is measured with the component mounted on a low effective therma l conductivity test board in free air. see tech brief tb379 fo r details. 2. for jc , the ?case temp? location is the center of the exposed metal pad on the package underside. important note: all parameters having min/max specifications are guaranteed. typical values are for information purposes only. u nless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: t j = t c = t a electrical specifications v s + = +5v, v s - = -5v, r f = 392 for a v = 1, r f = 250 for a v = 2, r l = 150 , t a = +25c unless otherwise specified. parameter description conditions min typ max unit ac performance bw -3db bandwidth a v = +1 1400 mhz a v = +2 800 mhz bw1 0.1db bandwidth a v = +2 100 mhz sr slew rate v o = -2.5v to +2.5v, a v = +2 6000 v/s t s 0.1% settling time v out = -2.5v to +2.5v, a v = -1 8 ns e n input voltage noise 1.7 nv/ hz i n - in- input current noise 19 pa/ hz i n + in+ input current noise 50 pa/ hz dg differential gain error (note 3) a v = +2 0.01 % dp differential phase error (note 3) a v = +2 0.03 input characteristics c in input capacitance 1.5 pf enable (5962-0625601qxc only) t en enable time 170 ns t dis disable time 1.25 s note: 3. standard ntsc test, ac signal amplitude = 286mv, f = 3.58mhz. 5962-0625601, 5962-0625602
3 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications ca n be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corpor ation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com fn6491.2 november 3, 2011 pin descriptions 5962-0625601qxcis (10 ld flat pack) 5962-0625602qxcis (10 ld flat pack) pin name function equivalent circuit 1, 5, 9, 10 1, 5, 8 , 9 ,10 nc not connected 2 2 in- inverting input circuit 1 3 3 in+ non-inverting input (see circuit 1) 4 4 vs- negative supply 6 6 out output circuit 2 7 7 vs+ positive supply 8ce chip enable circuit 3 in- in+ v s + v s - v s + v s - out v s + v s - ce 5962-0625601, 5962-0625602
4 fn6491.2 november 3, 2011 5962-0625601, 5962-0625602 ceramic metal seal fl atpack packages (flatpack) notes: 1. index area: a notch or a pin one identification mark shall be locat- ed adjacent to pin one and shall be located within the shaded area shown. the manufacturer?s identification shall not be used as a pin one identification mark. alternately, a tab (dimension k) may be used to identify pin one. 2. if a pin one identification mark is used in addition to a tab, the lim- its of dimension k do not apply. 3. this dimension allows for off- center lid, meniscus, and glass overrun. 4. dimensions b1 and c1 apply to lead base metal only. dimension m applies to lead plating and finish thickness. the maximum lim- its of lead dimensions b and c or m shall be measured at the cen- troid of the finished lead surfac es, when solder dip or tin plate lead finish is applied. 5. n is the maximum number of terminal positions. 6. measure dimension s1 at all four corners. 7. for bottom-brazed lead packages, no organic or polymeric mate- rials shall be molded to the bottom of the package to cover the leads. 8. dimension q shall be measured at the point of exit (beyond the meniscus) of the lead from t he body. dimension q minimum shall be reduced by 0.0015 inch (0.038mm) maximum when sol- der dip lead finish is applied. 9. dimensioning and tolerancing per ansi y14.5m - 1982. 10. controlling dimension: inch. -d- -c- 0.004 h a - b m d s s -a- -b- 0.036 h a - b m d s s e e a q l a e1 seating and l e2 e3 e3 base plane -h- b c s1 m c1 b1 (c) (b) section a-a base lead finish metal pin no. 1 id area a m d k10.a mil-std-1835 cdfp3-f10 (f-4a, configuration b) 10 lead ceramic metal seal flatpack package symbol inches millimeters notes min max min max a 0.045 0.115 1.14 2.92 - b 0.015 0.022 0.38 0.56 - b1 0.015 0.019 0.38 0.48 - c 0.004 0.009 0.10 0.23 - c1 0.004 0.006 0.10 0.15 - d - 0.290 - 7.37 3 e 0.240 0.260 6.10 6.60 - e1 -0.280-7.11 3 e2 0.125 - 3.18 - - e3 0.030 - 0.76 - 7 e 0.050 bsc 1.27 bsc - k 0.008 0.015 0.20 0.38 2 l 0.250 0.370 6.35 9.40 - q 0.026 0.045 0.66 1.14 8 s1 0.005 - 0.13 - 6 m - 0.0015 - 0.04 - n10 10- rev. 0 3/07
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